The invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and in particular, to a semiconductor device and a method of manufacturing the semiconductor device to obtain a high degree of reliability and a high yield.
Methods of manufacturing semiconductor devices such as IC and LSI have front process of forming integrated circuits on a surface of a silicon wafer and a testing process of testing the electrical characteristics of each circuit in a predetermined stage to judge whether the circuit is defective or non-defective every chip. Alternatively, the methods have back process including a process of separating the silicon wafer into individual chips or a process of further encapsulating the chips with resin, ceramic or the like as the occasion demands.
The above testing of electrical characteristics can be broadly divided into a probing test for judging good or wrong of conduction between circuits, a burn-in test for acceleratively screening failures by applying thermal and electrical stresses to the circuits, and a final test for finally testing the circuits at high frequencies.
In the above various kinds of testing methods all, basic connecting means between a wafer to be tested or a chip to be tested and an external test system are the same. They use a method of mechanically pressing conductive fine probes individually on electrode pads of aluminum alloy or other alloys, which pads have a square ranging between several tens xcexcm and one hundred several tens xcexcm and a thickness of about 1 xcexcm and are patterned with a pitch ranging between several tens xcexcm and one hundred several tens xcexcm on a wafer to be tested. As an example of the above described probe, there is a tungsten probe of which tip has a curvature of about 20 xcexcm.
Concerning the above described processes in the methods of manufacturing semiconductor devices, JP-A-1-150863 discloses a configuration in which a bridge of which both ends are fixed on a top surface of a substrate is formed, and a probe is formed at the center of the bridge, and conductive wiring is formed from the probe. JP-A-7-7052 discloses a configuration in which a cantilever structure is held by an insulating substrate having conductive wiring patterns formed thereon and is used as a probe for measuring electrical characteristics.
In the methods of testing semiconductor devices as described above with reference to the prior art, there are the following problems.
In all the known methods described above, a plurality of bridges or cantilever structures are individually bonded to a substrate, and therefore much time and effort are required for positioning and fixing probes with high accuracy. Further, for the known methods, it is difficult to cope with the demands for narrower pitches and also it is not easy to improve manufacturing yield. Also, it is considered that it is difficult for the bonding method to reduce variations in the height of the probes when a plurality of probes are formed.
Also, with increasing integration of semiconductor elements, narrow-pitch testing technology and low-load testing technology reducing damage applied to thin film electrode pads of semiconductor elements are more desired.
The invention is intended to resolve the above described problems. An object of the invention is, in the testing of electrical characteristics of semiconductor devices, to provide a semiconductor device and a method of manufacturing the semiconductor device allowing efficient manufacturing of the semiconductor device, wherein the method has, for example, an efficient testing process reliably bringing the probes into contact with the electrode pads formed with a narrow pitch on semiconductor element to be tested.
A method of manufacturing a semiconductor device according to a first aspect of the invention has a forming process of forming a semiconductor element comprising electrode pads on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to the electrode pads formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode pads, the testing apparatus having a probe-formed substrate comprising a plurality of beams having probes to be electrically connected to the electrode pads, and the probe-formed substrate having a first beam having at least one probe for electrically connection with the electrode pad and a second beam having a number of probes for electrical connection with the electrode pads of which number is more than the number of the electrode pads electrically connected by the first beam.
Preferably, the beam structure can be formed such that the pressing force applied to each probe may be made constant according to a different number of probes formed on the first beam, and it can be easily cope with electrode pads with a narrow pitch while suppressing the difference between the pressing forces, and wiring is connected from the probes to secondary electrode pads via an insulating layer.
By the way, the manufacturing method of the invention is adaptable to a semiconductor device in which a pitch between adjacent electrode pads is as narrow as equal to or less than 80 xcexcm.
Also, in the above described method of manufacturing a semiconductor device, the second beam may have a beam cross section larger than that of the first beam.
Also, in the above described method of manufacturing a semiconductor device, the second beam may have a beam length shorter than that of the first beam.
Also, in the above described method of manufacturing a semiconductor device, the second beam may have a beam width or beam thickness larger than that of the first beam.
A method of manufacturing a semiconductor device according to a second aspect of the invention has forming process of forming a semiconductor element comprising electrode pads on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to the electrode pads formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode pads, the testing apparatus having a probe-formed substrate comprising a beam having a probe to be electrically connected to the electrode pad and a plurality of secondary electrodes connected to the probe through wiring, and the probe-formed substrate having a first wiring for connection with a first probe and having a first wiring width and a second wiring for connection with a second probe and having a second wiring width larger than the first wiring width.
By the way, the comparing of the wiring width may be done in volume or projected area of the wiring.
Also, in the above described method of manufacturing a semiconductor device, the second wiring may have a wiring width equal to or more than twice as wide as that of the first wiring.
Also, in the above described method of manufacturing a semiconductor device, the second wiring may have a wiring width equal to or more than 10 times as wide as that of the first wiring.
Also, in the above described method of manufacturing a semiconductor device, the first wiring may be a signal line and the second wiring may be a power supply line or a ground line.
A method of manufacturing a semiconductor device according to a third aspect of the invention has forming process of forming a semiconductor element on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to an electrode pad formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode pad, the testing apparatus having a probe-formed substrate comprising a plurality of beams formed thinner than the thickness of surroundings, the beams comprising a first beam having a probe to be electrically connected to the electrode pad and a second beam having no probe.
A method of manufacturing a semiconductor device according to a fourth aspect of the invention includes forming process of forming a semiconductor element on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to an electrode pad formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode pad, the testing apparatus having a probe-formed substrate comprising a plurality of beams having a probe to be electrically connected to the electrode pad, a first beam for connection with the probe-formed substrate through a first supporting portion, and a second beam for connection with the substrate through a second supporting portion having a number of supporting portions more than that of the first beam. For example, the probe-formed substrate comprises both a both-ends-supported beam and a cantilever beam.
A method of manufacturing a semiconductor device according to a fifth aspect of the invention include forming process of forming a semiconductor element on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to electrode pads formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode pads, the electrode pads being formed along sides of periphery of the semiconductor element after it is cut out of the wafer, and the testing apparatus having a probe-formed substrate comprising a plurality of beams having probes to be electrically connected to the electrode pads, and a beam having probes for connection with the electrodes pads of at least two sides of the sides being supported on the probe-formed substrate by a plurality of supporting portions.
For example, the beam having probes for connection with the electrode pads of the two sides may be configured to be connected to the probe-formed substrate by a both-ends-supported beam. Also, probes for connection with the other electrode pads may be supported on the substrate by a cantilever.
Further, the beam may use a beam made of silicon. Also, it is possible to form outline of the beam by dry-etching processing.
A semiconductor device according to the present invention is characterized by being manufactured by any of the above described manufacturing methods.
Also, in order to make uniform each of the pressing forces of the probes, it is possible to form a single material or composite material on a surface opposite to the probe-formed surface of the beam. When silicon is applied to the beam, the micro-machining technology of silicon can be applied to the processing of the beam, allowing the formation of fine beam structure. Also, since the beam and the semiconductor element have the same coefficient of thermal expansion, it is possible to prevent position deviation between the probes and the electrode pads, which may be produced during testing. Further, when dry-etching processing is applied to the outline-forming method for the beam of silicon, a curvature can be formed at root portions of the beam on which stress may concentrate, thereby allowing the increased rigidity of the whole beam.
When the above described structure is applied to the narrow-pitch electrode pads of a semiconductor element to be tested, the probes can be reliably formed even in portions in which the forming of individual beams is impossible, and further contact manner applying a low pressing force can be realized.
According to the present invention, for the testing of the electrical characteristics of a semiconductor device, a method of manufacturing a semiconductor device can be obtained which has, for example, an efficient testing process of bringing, with high reliability, the probes into contact with the electrode pads formed with a narrow pitch on a semiconductor element to be tested and thereby allows efficient manufacturing of the semiconductor device.
Also, the invention can suppress the difference of low pressing forces among the probes not to form undesired scars on the electrode pads, thus allowing the increased life of the probes. In addition, thereby, the invention allows improvement of the manufacturing yield and reduction of the manufacturing cost, as a result, providing a semiconductor device of low cost and high reliability. As a result, the semiconductor elements or electronic components tested can be provided at very low cost.